In silicon semiconductor integrated circuit (LSI), conventionally, aluminum (Al) or Al alloy has been used extensively as the conductive material. With the recent advance in microfabrication technology used in the method for manufacturing of LSI, and for the purpose of reduction in resistance in the wiring and for improvement of reliability, use of copper (Cu) in the conductive material has begun to appear. Since Cu easily diffuses in a silicon oxide film, according to the prior art, conductive barrier metal film for prevention of diffusion of Cu is provided to side face and bottom face of the Cu wiring, and insulating barrier film is employed at top face of the Cu wiring.
In recent years, progress in microfabrication of LSI resulted in wirings with finer dimensions, and increased capacity between wirings poses a problem, while introduction of porous low-dielectric constant film to interlayer insulating film has been accelerated. This is because employment of multilayer wiring to semiconductor elements allows high-speed and low-power connection, realization of low-dielectric constant features of interlayer insulating film as well as microfabrication are effective, and it is therefore necessary to meet with both requirements.
For the purpose of reduction in effective capacity between wirings, realization of low-dielectric constant features of interlayer insulating film (in this case, silicon oxide film (k=4.2)) is necessary. As low-dielectric constant film, for example, HSQ (Hydrogen Silsesquioxane) film, CDO (Carbon doped oxide) or organic film are included. These are formed by rotation coating method, vapor deposition method or the like.
Patent Document 1 discloses a technology of forming porous insulating film using plasma CVD method. Patent Document 2 describes a technology of forming porous insulating film using cyclic organosiloxane.
Patent Document 1: Japanese Patent Application Laid-Open No. 2004-289105
Patent Document 2: Japanese Patent Application National Publication No. 2002-526916